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Computer Architecture - Team Bernd Becker
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TAMSIN

| project staff | description | publications |


project staff

Chair of Computer Architecture
Alexander Czutro, Dipl.-Inf. developer / contact


description

TAMSIN (Time-rANge-based SIMulation) is a simulator for gate-delay faults. For a given fault and a given test set, highly accurate simulation is performed in order to determine the delay sizes for which the test set is guaranteed to detect the fault. Depending on the calculated delay sizes and the probability distribution density for different delay sizes, the tool computes the realistic detection probability of the fault. Furthermore, the tool is able to map the fault coverage to the realistic detection probability as a function of the defect-based error probability.

The newest version of the tool uses a Monte-Carlo approach to compute the overall detection probability of a delay fault while considering process variations. Applications of these capabilities include the estimation of component criticality.



publications
A. Czutro, N. Houarche, P. Engelke, I. Polian, M. Comte, M. Renovell, B. Becker
A Simulator of Small-Delay Faults Caused by Resistive-Open Defects
European Test Symposium, 2008
M. Sauer, A. Czutro, I. Polian, B. Becker
Estimation of Component Criticality in Early Design Steps
IEEE International Online Testing Symposium, 2011