TIGUAN TSI

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TIGUAN (Thread-parallel Integrated test pattern Generator Utilising satisfiability ANalysis) is a test pattern generator that maps the test-pattern-generation problem to instances of the Boolean Satisfiability Problem and hence benefits from efficient learning strategies available in modern SAT-solvers, as these strategies allow the tool to classify redundant and hard-to-detect faults in less time than traditional structural approaches. Furthermore, the tool has been extended in order to allow a powerful combination of dynamic compaction and SAT-based test pattern generation.

The tool uses an own easily extensible fault model (CMS@ – Conditional Multiple Stuck-At), according to which an arbitrary number of victim wires have a constant logic value 1 or 0 depending on the assignment of an arbitrary set of aggressor wires. All classical fault models, including stuck-at, bridges and delay-fault models, as well as models that allow defect-based testing, like exhaustive testing, can be mapped to CMS@.

Among other applications, the tool has been used by the University of Paderborn to grade the fault secureness of fault-tolerant systems.

The tool's new generation is given by TIGUAN TSI (TSI = Total System Integration), a C++ library that can be combined with all HDL parsers. Moreover, the library provides time-frame-extension algorithms that allow the application of test pattern generation for sequential circuits.

The used SAT-solver engine is antom.