Name | Kohei Miyase, Dr. |
k_miyase@cse.kyutech.ac.jp |
Kohei Miyase
Jahre: 2016 | 2015 | 2013 | 2008
2016

- Matthias Sauer, Jie Jiang, Sven Reimer, Kohei Miyase, Xiaoqing Wen, Bernd Becker, Ilia Polian
On Optimal Power-aware Path Sensitization
2016 2016 25nd IEEE Asian Test Symposium (ATS)
2015

- Kohei Miyase, Matthias Sauer, Bernd Becker, Xiaoqing Wen, Seiji Kajihara
Identification of High Power Consuming Areas with Gate Type and Logic Level Information
2015 IEEE European Test Symposium
2013

- Karsten Scheibler, Matthias Sauer, Kohei Miyase, Bernd Becker
Controlling Small-Delay Test Power Consumption using Satisfibility Modulo Theory Solving
2013 GI/ITG Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen” - Kohei Miyase, Matthias Sauer, Bernd Becker, Xiaoqing Wen, Seiji Kajihara
Search Space Reduction for Low-Power Test Generation
2013 22nd IEEE Asian Test Symposium (ATS)
2008

- Ilia Polian, Yusuke Nakamura, Piet Engelke, Stefan Hillebrecht, Kohei Miyase, Seiji Kajihara, Bernd Becker, Xiaoqing Wen
Diagnose realistischer Defekte mit Hilfe des X-Fehlermodells
2008 GMM/GI/ITG Reliability and Design Conf., Seiten: 155 - 156 - Ilia Polian, Yusuke Nakamura, Piet Engelke, Stefan Spinner, Kohei Miyase, Seiji Kajihara, Bernd Becker, Xiaoqing Wen
Diagnosis of Realistic Defects Based on the X-Fault Model
2008 IEEE Design and Diagnostics of Electronic Circuits and Systems, Seiten: 263 - 268