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Test methods beyond random logic - Sommersemester 04

Literatur


Literatur zu den Themen 2.3, 3.1 - 3.5 und 4.3 ist unter ``Materialien'' zum Download verfügbar. Login: ``testsem'', Passwort wurde an die Seminarteilnehmer per Mail geschickt.
Area 1: Memory test
1.1 Fault models and test methods for memories
N. Jha and S. Gupta, Testing of Digital Systems, Chap. 14.1 - 14.5
1.2 Built-in self test & self repair for memories
A. van der Goor, Tutorial on testing memories, Chap. 7
N. Jha and S. Gupta, Testing of Digital Systems, Chap. 14.6
Area 2: Test of field programmable gate arrays (FPGAs)
2.1 FPGA test
Huang et al., Testing configurable LUT-based FPGA
s, Trans. VLSI 1998
2.2 Built-in self test and diagnosis of FPGAs
Abramovici and Stroud, BIST-based test and diagnosis of FPGA logic blocks, Trans. VLSI 2001
2.3 Delay test of FPGAs
Girard et al., Requirements for delay testing of look-up tables in SRAM-based FPGAs, Europ. Test Workshop 2003
Area 3: Test of microelectromechanical systems (MEMS)
3.1 MEMS fabrication
G. Fedder, MEMS fabrication, Int
l Test Conf. 2003 (ITC03)
3.2 Failure mechanisms in MEMS
J. Walraven, Failure mechanisms in MEMS, ITC03
J. Walraven, Future challenges for MEMS failure analysis, ITC03
3.3 Tools and techniques for failure analysis of MEMS
J. Walraven, Tools and techniques for failure analysis and qualification of MEMS, ITC03
3.4 Built-in self test for MEMS
N. Deb and S. Blanton, Built-in self test of CMOS-MEMS accelerometers, ITC02
3.5 An industrial MEMS testing experience report
T. Maudie et al., MEMS Manufacturing testing
: an accelerometer case study, ITC03
Area 4: Test of quantum circuits
4.1 Introduction to quantum computing
M. Nielsen and I. Chuang , Quantum computation and quantum information, Chap. 1.1 - 1.3
4.2 Quantum circuits
M. Nielsen and I. Chuang , Quantum computation and quantum information, Chap. 1.4 and 4.1 - 4.6
4.3 Testing of quantum circuits
J. Hayes et al., Fault testing for reversible circuits, VLSI Test Symp. 2003
J. Hayes et al., Testing for Missing-Gate Faults in Reversible Circuits, submitted to Asian Test Symp. 2004