2014

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• Dominik Erb, Michael Koche, Matthias Sauer, Stefan Hillebrecht, Tobias Schubert, Hans-Joachim Wunderlich, Bernd Becker
  Exact Logic and Fault Simulation in Presence of Unknowns
  2014 ACM Transactions on Design Automation of Electronic Systems (TODAES), Band: 19, Seiten: 28:1 - 28:17
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  significantly increased without increasing the test set size.

2013

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• Stefan Hillebrecht, Michael A. Kochte, Dominik Erb, Hans-Joachim Wunderlich, Bernd Becker
  Accurate QBF-based test pattern generation in presence of unknown values
  2013 Conf. on Design, Automation and Test in Europe
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  circuits.
• Matthias Sauer, Alexander Czutro, Tobias Schubert, Stefan Hillebrecht, Ilia Polian, Bernd Becker
  SAT-based Analysis of Sensitisable Paths
  2013 Test of Computers, Band: 30, Nummer: 4, Seiten: 81 - 88
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  A common trend in the past has been to detect delay defects in nanoscale technologies through the longest sensitisable paths. This approach does not hold up for non-trivial defects due to modeling inaccuracies. This article supports tests through all paths of customized length, using current SAT-solving advances.

2012

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• Stefan Hillebrecht, Michael Kochte, Hans-Joachim Wunderlich, Bernd Becker
  Exact Stuck-at Fault Classification in Presence of Unknowns
  2012 IEEE European Test Symp.
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  results on ISCAS benchmark and industrial circuits. The applicability of our algorithm to large industrial circuits is demonstrated.

2011

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• Matthias Sauer, Alexander Czutro, Tobias Schubert, Stefan Hillebrecht, Ilia Polian, Bernd Becker
  SAT-Based Analysis of Sensitisable Paths
  2011 IEEE Design and Diagnostics of Electronic Circuits and Systems, Seiten: 93 - 98
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  Manufacturing defects in nanoscale technologies have highly complex timing behaviour that is also affected by process variations. While conventional wisdom suggests that it is optimal to detect a delay defect through the longest sensitisable path, non-trivial defect behaviour along with modelling inaccuracies necessitate consideration of paths of well-controlled length during test generation. We present a generic methodology that yields tests through all sensitisable paths of user-specified length. The resulting tests can be employed within the framework of adaptive testing. The methodology is based on encoding the problem as a Boolean-satisfiability (SAT) instance and thereby leverages recent advances in SAT-solving technology.

2009

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• Stefan Hillebrecht, Ilia Polian, P. Ruther, S. Herwik, Bernd Becker, Oliver Paul
  Reliability Characterization of Interconnects in CMOS Integrated Circuits Under Mechanical Stress
  2009 Int'l Reliability Physics Symp.

2008

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• Stefan Spinner, Ilia Polian, Piet Engelke, Bernd Becker, Martin Keim, Wu-Tung Cheng
  Automatic Test Pattern Generation for Interconnect Open Defects
  2008 VLSI Test Symp., Seiten: 181 - 186
• Stefan Spinner, Ilia Polian, Piet Engelke, Bernd Becker, Martin Keim, Wu-Tung Cheng
  Automatic Test Pattern Generation for Interconnect Open Defects
  2008 GI/ITG Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”
• Ilia Polian, Yusuke Nakamura, Piet Engelke, Stefan Hillebrecht, Kohei Miyase, Seiji Kajihara, Bernd Becker, Xiaoqing Wen
  Diagnose realistischer Defekte mit Hilfe des X-Fehlermodells
  2008 GMM/GI/ITG Reliability and Design Conf., Seiten: 155 - 156
• Ilia Polian, Yusuke Nakamura, Piet Engelke, Stefan Spinner, Kohei Miyase, Seiji Kajihara, Bernd Becker, Xiaoqing Wen
  Diagnosis of Realistic Defects Based on the X-Fault Model
  2008 IEEE Design and Diagnostics of Electronic Circuits and Systems, Seiten: 263 - 268
• Stefan Hillebrecht, Ilia Polian, Piet Engelke, Bernd Becker, Martin Keim, Wu-Tung Cheng
  Extraction, Simulation and Test Generation for Interconnect Open Defects Based on Enhanced Aggressor-Victim Model
  2008 Int'l Test Conf., Seiten: 1 - 10

2007

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• Stefan Spinner, Ilia Polian, Bernd Becker, P. Ruther, Oliver Paul
  A System for the Calibration and Reliability Testing of MEMS Devices Under Mechanical Stress
  2007 VDE Microsystem Technology Congress, Seiten: 861 - 864
• Stefan Spinner, Jie Jiang, Ilia Polian, Piet Engelke, Bernd Becker
  Simulating Open-Via Defects
  2007 IEEE Asian Test Symp., Seiten: 265 - 270
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  Open-via defects are a major systematic failure mechanism in nanoscale manufacturing processes. We present a flow for simulating open-via defects. Electrical parameters are extracted from the layout and technology data and represented in a way which allows efficient simulation on gate level. The simulator takes oscillation caused by open-via defects into account and quantifies its impact on defect coverage. The flow can be employed for manufacturing test as well as for defect diagnosis.

2006

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• Stefan Spinner, M. Doelle, P. Ruther, Ilia Polian, Oliver Paul, Bernd Becker
  A System for Electro-Mechanical Reliability Testing of MEMS Devices
  2006 Int'l Symp. for Testing and Failure Analysis, Seiten: 147 - 152
• Stefan Spinner, J. Bartholomeyczik, Bernd Becker, M. Doelle, Oliver Paul, Ilia Polian, P. Roth, K. Seitz, P. Ruther
  Electromechanical Reliability Testing of Three-Axial Force Sensors
  2006 Design, Test, Integration and Packaging of MEMS/MOEMS, Seiten: 77 - 82
• Stefan Spinner, J. Bartholomeyczik, Bernd Becker, M. Doelle, Oliver Paul, Ilia Polian, R. Roth, K. Seitz, P. Ruther
  Reliability Testing of Three-Dimensional Silicon Force Sensors
  2006 GI/ITG Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”

2005

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• M. Doelle, Stefan Spinner, P. Ruther, Ilia Polian, Oliver Paul, Bernd Becker
  A System for Determining the Impact of Mechanical Stress on the Reliability of MEMS
  2005 IEEE European Test Symp., Seiten: 57 - 61
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  This paper reports on an experimental test system which enables the automated analysis of mechanical stress impact on the reliability of microelectromechanical systems (MEMS). With this system, in-situ electrical characterization and optical inspection are performed while subjecting MEMS devices to defined mechanical loads. Impact objects of various geometries, e.g., contact probes or wafer prober needles, can be applied which are aligned relative to the MEMS device using an xyz-nanopositioning stage with an accuracy of 25 nm. This positioning stage enables programmable static forces up to 5 N and dynamic loads at frequencies up to 800 Hz. With this highly flexible system reliability tests, postmanufacturing tests and stress screens can be performed on single chips as well as on whole wafers with diameters up to 6 inch. Preliminary results on long-term reliability tests using CMOS-based stress sensors exploiting the piezoresistive effect in field effect transistors are presented.
• M. Doelle, Stefan Spinner, P. Ruther, Ilia Polian, Oliver Paul, Bernd Becker
  A System for Determining the Impact of Mechanical Stress on the Reliability of MEMS
  2005 GI/ITG Workshop “Testmethoden und Zuverlässigkeit von Schaltungen und Systemen”, Seiten: 88 - 89
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  This paper reports on an experimental test system which enables the automated analysis of mechanical stress impact on the reliability of microelectromechanical systems (MEMS). With this system, in-situ electrical characterization and optical inspection are performed while subjecting MEMS devices to defined mechanical loads. Impact objects of various geometries, e.g., contact probes or wafer prober needles, can be applied which are aligned relative to the MEMS device using an xyz-nanopositioning stage with an accuracy of 25 nm. This positioning stage enables programmable static forces up to 5 N and dynamic loads at frequencies up to 800 Hz. With this highly flexible system reliability tests, postmanufacturing tests and stress screens can be performed on single chips as well as on whole wafers with diameters up to 6 inch. Preliminary results on long-term reliability tests using CMOS-based stress sensors exploiting the piezoresistive effect in field effect transistors are presented.