Technische Informatik - winter term 04/05
material
6. Exercises
| Exercise 01 | must not be submitted | |
| Exercise 02 | Submission Nov 02 2004, 12:00 | |
| Exercise 03 | Submission Nov 08 2004, 16:00 | |
| Exercise 04 | Submission Nov 11 2004, 16:00 | |
| Exercise 05 | Submission Nov 22 2004, 16:00 | |
| Exercise 06 | Submission Nov 29 2004, 16:00 | |
| Exercise 07 | Submission Dec 06 2004, 16:00 | |
| Exercise 08 | Submission Dec 13 2004, 16:00 | |
| Exercise Sheet 09 | Submission 20.12.2004, 16:00 | |
| Exercise Sheet 10 | Submission 10.01.2005, 16:00 | |
| Exercise Sheet 11 | Submission 17.01.2005, 16:00 | |
| Exercise Sheet 12 | Submission 24.01.2005, 16:00 | |
| Exercise Sheet 13 | Submission 31.01.2005, 16:00 | |
| Exercise Sheet 14 | Submission 07.02.2005, 16:00 | |
| Exercise Sheet 15 | Submission 14.02.2005, 16:00 | |
Data Sheet
| Data Sheet 1 | ||
| Data Sheet 2 | ||
| List of the RE-TI instructions | ||
lecture
| Chapter 01.01 Introduction | ||
| Chapter 01.02 VLSI CAD | ||
| Chapter 02.01 Views of Computers | ||
| Chapter 02.02 Architecture and Functionality | ||
| Chapter 02.03 HW/SW and instruction sets | ||
| Chapter 03.01 Pipelining | ||
| Chapter 04.01 Overview of Memory Organisation | ||
| Chapter 04.02 Caches | ||
| Chapter 04.03 Background Memory | ||
| Chapter 05.01 Parallelism | ||
| Chapter 06.01 Coding of tokens | ||
| Chapter 06.02 Coding of numbers | ||
| Chapter 07.01 Boolean functions | ||
| Chapter 07.02 Boolean Algebra | ||
| Chapter 07.03 Boolean expressions | ||
| Chapter 07.04 Binary Decision Diagrams | ||
| Chapter 08.01 Two-level Logic Synthesis | ||
| Chapter 08.02 Implicants and Prime Implicants | ||
| Chapter 08.03 Computation of a minimal polynom | ||
| Chapter 09.01 Realization of Boolean Functions | ||
| Chapter 09.02 Modelling using Circuits | ||
| Chapter 10.01 Adder | ||
| Chapter 10.02 ALU | ||
| Chapter 11.01 Physical properties and timing | ||
| Chapter 11.02 Flipflops | ||
| Chapter 11.03 Circuits | ||
| Chapter 11.04 SRAM | ||
| Chapter 12.01 Abstract Computer | ||
| Chapter 12.02 Real Machine | ||
| Chapter 12.03 Data paths | ||
| Chapter 13.01 Idealized Timing Diagrams | ||
| Chapter 13.02 Control Logic | ||
| Chapter 13.03 Exact Timing | ||
| Chapter 14.01 Interfaces | ||
| Chapter 14.02 Protocols | ||
| Overview | ||
