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Prof. Dr. Bernd Becker
AddressInstitute of Computer Science
Georges-Koehler-Allee 51
79110 Freiburg im Breisgau
OfficeBuilding 51, Room 01..007
Phone++49 +761 203-8141
Fax++49 +761 203-8142


1988University of Saarland, Faculty for Mathematics and Natural Sciences, Habilitation in Computer Science. Postdoc Advisor: Prof. Dr. G. Hotz, Topic: Design and Test of Boolean Circuits.
1983 Dr. Eduard - Martin - Award of Vereinigung der Freunde der Universität des Saarlandes for ``outstanding scientific work in his PhD thesis''.
1973-1982    University of Saarland, Department of Mathematics and Computer Science, Diploma in Mathematics (1979). Thesis Supervisor: Prof. Dr. G. Frey. Diploma Thesis Title: An Algebraic Proof of the Main Theorems of Complex Multiplication. PhD (1982). Thesis Supervisor: Prof. Dr. G. Hotz. PhD Thesis Title: On the Crossing-free, Rectangular Embedding of Weighted Graphs in the Plane.

2010-2012    Dean of the Faculty of Engineering, University of Freiburg
2009/2010Off-Site Visiting Professor, VLSI Design and Education Center, University of Tokyo (2 months)
2002/2003Mentor Graphics Corporation, Design for Test Division, Wilsonville, Oregon (Visiting Researcher 2 months)
since 1995Professor (C4) for Computer Science, Faculty of Engineering of the University of Freiburg, Head of the Chair of Computer Architecture
1993-1994Visiting Researcher at the International Computer Science Institute, Berkeley, CA.
1992Offer for a professorship (C4) in practical computer science (Gesamthochschule Essen)
1989-1995Professor (C3) for Complexity Theory and Efficient Algorithms, Computer Science Department, J.W. Goethe - University Frankfurt am Main
1988-1989Researcher and Lecturer in the Leibniz-Program of DFG (Prof. G. Hotz).
1987-1988Visiting Professor, Computer Science Department, J.W. Goethe - University Frankfurt am Main.
1985Siemens AG, Testabteilung, ZTI DES V, Munich (Visiting Scientist, 2 months)
1984-1988Researcher and Lecturer in the Sonderforschungsbereich 124 (B1) VLSI Design Methods and Parallel Algorithms, University of Saarland and Kaiserslautern.
1982Siemens AG, Testabteilung, ZTI DES V, Munich (Visiting Scientist, 2 months)
1981-1983Researcher, Computer Science Department (Prof. Dr. G. Hotz), University of Saarland
1979-1981  Researcher in the Sonderforschungsbereich 100 Elektronic Speech Recognition, University of Saarland.

since 2011Member of the Scientific Directorate, Leibniz Center for Informatics, Schloss Dagstuhl
since 2010Board of Directors, Centre for Security and Society, University of Freiburg
since 2010Member of Steering Committee: IEEE International Workshop on Reliability Aware System Design and Test (RASDAT)
since 2007Member of Steering Committee: European Test Symposium (ETS)
since 2007Topic Chair / Co-Chair "Test Generation, Simulation and Diagnosis", DATE (Design and Test in Europe)
2007General Chair, ETS (European Test Symposium)
since 2005Member of the Graduate School 1103 Embedded Microsystems
2005-2009Member of the Graduate School 806 Mathematische Logik und Anwendungen
since 2003Co-Speaker of the Transregional Collaborative Research Center 14 Automatic Verification and Analysis of Complex Systems (AVACS)
1997-2003Program Committee Member, ETW (European Test Workshop)
2000-2001    Member of the Organizing Committee of ICCD (International Conference of Computer Design)
since 1990    Member of the Steering Committee of the German GI/ITG/GME Group on Testing and Fault Tolerance.
1999General Co-Chair, ISMVL (International Symposium on Multiple Valued Logic)

2012Fellowship for Innovations in University Teaching (Baden-Württemberg Stiftung, Joachim Herz Stiftung und Stifterverband für die Deutsche Wissenschaft)
2012Instructional Development Award, University of Freiburg
since 2011Member of Academia Europaea
since 2008    IEEE Fellow for contributions to the development of algorithms and data structures for testing and verification of integrated circuits

Patent DE3734816: Schneller, leicht generierbarer und leicht testbarer VLSI Addierer; 27.4.1989, Patentinhaber: Siemens AG; Erfinder: Bernd Becker, Reiner Kolla
Patent US5153849: Multiplier Having an Optimum Arrangement of Anding and Adding Circuits; 6.10.1992; Patentinhaber: Siemens AG; Erfinder: Gerd Venzl, Rebecca Mitchell, Ulrich Nerz, Holger Soukup, Wolfram Roth, Bernd Becker

More than 200 publications in conferences, journals and books during the last 10 years.
To the publication browser of the chair of computer architecture

The research activities of Bernd Becker have been primarily in the area of computer-aided design, test and verification of (digital) circuits and systems (VLSI CAD). A focus of his research is the development and analysis of efficient data structures and algorithms in VLSI CAD. The development of symbolic methods for test and verification of digital circuits and their integration in the industrial flow is one of the major achievements of his work. More recently, he has been working on reliability issues of embedded systems (in particular formal methods for safety and security concerns) and test techniques for nanoelectronic circuitry. He has published more than 200 papers in peer-reviewed conferences and journals. He has been the holder of several research grants from DFG, BMBF, EU and industry as well.
To the research section of the chair of computer architecture

Introductory computer science, computer architecture, embedded systems, verification, test and reliability.
To the teaching section of the chair of computer architecture