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| 1988 | University of Saarland, Faculty for Mathematics and Natural Sciences, Habilitation in Computer Science. Postdoc Advisor: Prof. Dr. G. Hotz, Topic: Design and Test of Boolean Circuits. |
| 1983 | Dr. Eduard - Martin - Award of Vereinigung der Freunde der Universität des Saarlandes for ``outstanding scientific work in his PhD thesis''. |
| 1973-82 | University of Saarland, Department of Mathematics and Computer Science, Diploma in Mathematics (1979). Thesis Supervisor: Prof. Dr. G. Frey. Diploma Thesis Title: An Algebraic Proof of the Main Theorems of Complex Multiplication. PhD (1982). Thesis Supervisor: Prof. Dr. G. Hotz. PhD Thesis Title: On the Crossing-free, Rectangular Embedding of Weighted Graphs in the Plane. |
| Since 1995 | Professor (C4) for Computer Science, Faculty of Engineering of the University of Freiburg, Head of the Chair of Computer Architecture |
| 1993-1994 | Visiting Researcher at the International Computer Science Institute, Berkeley, CA. |
| 1989-1995 | Professor (C3) for Complexity Theory and Efficient Algorithms, Computer Science Department, J.W. Goethe - University Frankfurt am Main. Research areas: data structures for Boolean functions, synthesis, test and verification of VLSI circuits. Teaching subjects: introductory computer science, theoretical computer science, graph algorithms. |
| 1988-1989 | Researcher and Lecturer in the Leibniz-Program of DFG (Prof. G. Hotz). |
| 1987-1988 | Visiting Professor, Computer Science Department, J.W. Goethe - University Frankfurt am Main. |
| 1984-1988 | Researcher and Lecturer in the Sonderforschungsbereich 124 (B1) VLSI Design Methods and Parallel Algorithms, University of Saarland and Kaiserslautern. |
| 1981-1983 | Researcher, Computer Science Department (Prof. Dr. G. Hotz), University of Saarland |
| 1979-1981 | Researcher in the Sonderforschungsbereich 100 Elektronic Speech Recognition, University of Saarland. |
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| 2003-present | Co-Speaker of the Transregional Collaborative Research Center 14 AVACS |
| 2007-present | Steering Committee Member, ETS |
| 2007 | General Chair, ETS (European Test Symposium) |
| 2004-present | Topic Chair, ETS |
| 1997-2003 | Program Committee Member, ETW (European Test Workshop) |
| 2006 | Track Chair, VTS (IEEE VLSI Test Symposium) |
| 1999 | Publication Chair, ETW |
| 1997-2001, 2004-present | Program Committee Member, VTS (IEEE VLSI Test Symposium) |
| 2008-2009 | Topic Chair "Test Generation, Simulation and Diagnosis", DATE (Design and Test in Europe) |
| 2007 | Topic Co-Chair "Test Generation, Simulation and Diagnosis", DATE (Design and Test in Europe) |
| 1999-2001, 2004-2006 | Technical Program Committee Member, DATE (Design and Test in Europe) |
| 2000-2001 | Member of the Organizing Committee of ICCD (International Conference of Computer Design) |
| 1999 | General Co-Chair, ISMVL (International Symposium on Multiple Valued Logic) |
| 1999 | Program Committee Member, FTCS (Fault-Tolerant Computing Symposium) |
| 1991,1993,1995,1997,1999,2001 | Co-Organizer of the Dagstuhl Workshop on Computer Aided Design and Test. |
| Since 1990 | Member of the Steering Committee of the German GI/ITG/GME Group on Testing and Fault Tolerance. |
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| More than 100 publications in conferences, journals and books during the last 10 years. |
| To the publication browser of the chair of computer architecture |
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| The research activities of Bernd Becker have been primarily in the area of computer-aided design, test and verification of (digital) circuits and systems (VLSI CAD). A focus of his research is the development and analysis of efficient data structures and algorithms in VLSI CAD. The development of symbolic methods for test and verification of digital circuits and their integration in the industrial flow is one of the major achievements of his work. More recently, he has been working on verification methods for embedded systems and test techniques for nanoelectronic circuitry. He has published more than 150 papers in peer-reviewed conferences and journals. He has been the holder of several research grants from DFG, BMBF and industry as well. |
| To the research section of the chair of computer architecture |
| To the project section of the chair of computer architecture |
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| Introductory computer science, computer architecture, embedded systems, verification, test and reliability. |
| To the teaching section of the chair of computer architecture |
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| Invited Talk and Paper at CFV 2009, Sixth International Workshop on Constraints in Formal Verification Grenoble, France, June 26, 2009, a satellite event of CAV'09. |